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Projects by members => Projects by members => Tony Woodside => Topic started by: TonyWoodside on March 27, 2012, 01:18:19 am
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Later today I will be releasing my PCB layout for my replication of Stan's VIC Circuit. The PDF will be to scale so you can print it out and make your own VIC Circuit replication and it will be located on my "Documentations" page. If you have any questions feel free to ask.
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We are looking forward to it!
For those of you who have not seen the VIC board Tony sells on globalkast I have to say that he deserves a great deal of credit.
It takes an enormous effort and amount of time to go through all Stan's circuits, pictures, and specs and build a working PCB.
I wanted to design one myself but it didn't take long to realize it was cheaper and it would save me a lot of time to just buy one.
I bought one a few months back and was very suprised at the quality of the PCB, very well made and designed.
Thanks Tony for all your help and contributions!
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Thanks HMS!
Ok guys here it is!
http://www.globalkast.com/docs/VIC_Circuit_Production.pdf (http://www.globalkast.com/docs/VIC_Circuit_Production.pdf)
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Very cool Tony. Thanks!
TS
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Thankyou very much Tony :)
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thank you verry much Tony,for the skematics(I got them from your site early morning,before you posted here:d,i visit your site every day,thow for me is verry hard to build because i cannot find all the IC-s,whatever)you whore salleing pcbs for big bucs, what makes you change your mind and release the skematics? i mean no ofense!!you are the man
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WOW Tony!
That looks awsome!. great work.
Thanks
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I've had some people asking me about gerber files. I have uploaded the Eagle CAD 5.10.0 files to my site for download so you can make your gerber files. Enjoy!
http://www.globalkast.com/docs/VIC_Circuit_Production_Eagle-5.10.0_Files.zip (http://www.globalkast.com/docs/VIC_Circuit_Production_Eagle-5.10.0_Files.zip)
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So Tony, what made you decide to release these files?
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So Tony, what made you decide to release these files?
I just figured it was time. Nobody else has really break the circuit down after a year of having all the information. So I figured I would be the first to release all this info and research that I have done. Open Source 100%
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Thanks again...
One more question though, how do I convert the zipped file to be able to open it up in eagle?
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just unzip the files and then u should be able to open it in Eagle.
I will upload the raw Eagle files on here as an attachment.
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So Tony, what made you decide to release these files?
A question I think a lot of us have been itching to ask. :)
TS
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A useful freeware archive unpacker utility (ie for .rar .zip) is jzip - choose the custom install to NOT install the searchbar......
i find jZip works well good alternative freeware to winzip etc
http://www.jzip.com/
for those that dont have Eagle = http://www.cadsoftusa.com/download-eagle/freeware/
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Here's some more images of the VIC Circuit and a PDF of the Eagle CAD Schematic.
(http://www.globalkast.com/images/tonywoodside/Complete_Circuit_with_values_3-18-2012.png)
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Hi Tony,
That's a huge step throwing your pcb and schematic into the open-source community, thanks for that!
I hope it rendered enough funding for your research etc.
Problem I still have with your PCB is that I do not have 50% pulse duty cycle from the cell driver circuit.
And the pickup circuit has a lot off noise in the signal from the op-amp 318.
Got ideas how to fix this on your PCB?
If you have this working correctly, please let me know... or I still do not know how the PLL finds resonance with signals from the pickup and tap from the primary coil???
Thanks!
Br,
Webmug
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A useful freeware archive unpacker utility (ie for .rar .zip) is jzip - choose the custom install to NOT install the searchbar......
i find jZip works well good alternative freeware to winzip etc
http://www.jzip.com/
7Zip is a good open source option without any built in spyware.
http://www.7-zip.org/ (http://www.7-zip.org/)
TS
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I have a question about this schematic, Tony and others.. .
Why would you want a delayed signal getting into the Pll pin 3 which is the phase comparator input?
Being this way is understandable the damper resistor and diode in parallel with the primary...
Did you found any special reason for that?
I'm meaning pin 4 generates the positive so it turns off the first transistor pnp this turns off all the other transistors and so than makes a positive signal going into pin 3...
Don't you think it can give any kind of delay in the phase causing slightly lower frequency than resonance to be applied?
Or could it be to softening the signal?
I wire straight from pin 4 to 3 just like in the patent shows.
I simplified also the gated pulse frequency generator i use only 555 and 741 as in my schematic instead of 8 ics... it goes from 0 up to 100% duty cycle.
My pll system has only 8 ics including the transistor driver...
Nor i use the frequency dividers, i simply change the capacitors to change the range of the pll or gate frequency...
Another question is, why in the schematic posted the coils are not represented as in the original drawing where they were clearly opposing each other?
Best regards
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Hey Tony,
Thank you for posting your hard work. Your continued help is greatly appreciated.
I also want to thank everyone else who has supported Stan's research and their commit to the project. You guys are the greatest!!!