Retry N1001

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guys check this component... its a very nice way to get a variable dc source!

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I took the 74hct7046 out of a circuit i had build some 10 years ago.. and it was working! i arranged in a breadboard to test its viability... i had two circuits ... one was dead and one good! i dont find this chip to buy here in brazil ... i bring them from italy... 

so i just tested the lock output and is just like i said!

when the signal is = at pin 3 and 14 the lock signal goes high!

if the signal is high it must go to the bilateral switch that connects the pin13 and filter to the pin 9... and only after that to invert and go to the other bilaterl that connects the scanning ckt...

reverse!

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$ 1 0.0001992 40.34287934927352 64 7 50
w 368 304 336 304 0
r 192 368 336 368 0 100000
w 336 368 368 368 0
w 336 368 336 400 0
w 336 400 368 400 0
c 336 400 336 464 0 0.000009999999999999999 1.8695260321009406
g 336 464 336 480 0
w 336 240 432 240 0
R 336 240 272 240 0 0 40 5 0 0 0.5
O 496 336 560 336 0
165 368 272 432 224 2 0
w 432 240 496 240 0
w 496 240 496 304 0
a 624 384 736 384 8 5 0 1000000 2.499966244298395 2.5 100000
c 624 304 736 304 0 0.000009999999999999999 -0.8756039161843194
w 736 304 736 384 0
w 624 304 624 368 0
r 528 368 624 368 0 70000
w 736 256 736 304 0
w 624 256 624 304 0
r 736 256 624 256 0 200000
r 496 240 560 160 0 10000
r 560 160 656 160 0 10000
g 656 160 656 192 0
w 192 368 192 528 0
w 192 528 528 528 0
w 528 528 528 368 0
w 496 336 528 336 0
w 528 336 528 368 0
w 560 160 560 400 0
w 560 400 624 400 0
O 736 384 816 384 0
o 27 32 0 12298 5 0.0001 0 2 27 3
o 31 32 0 12546 3.7255810071758773 0.0001 0 1

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Wow

i just came to a conclusion i never did before...

i may have understood all the point behind using this pll and all

pay attention this is huge

i even ask you for donations if you can!

hahaha jokes a part

the pll is know to get the right frequency to get two signals perfectly in phase! isnt it?

so we know that when we have an antena and we have to match the impedance to get the most of the power on it.. . this is the point where the circuit sees it as a pure resistance because the current is perfectly in phase with the voltage being applied

all that said

when we disconnect the pin 4 from pin 3 we start to have a two independent systems one is the vco and one is the phase comparator that comands the vco

the pll must receive from the vic two signals to work perfectly

one is a voltage signal

and one is a current signal

and they simply need to be in phase... there is going to be a frequency that its going to happen and the pll will maintain it because of the lock mechanism

to get this signal is important to use a current transformer... this way it wont loose the isolation

a current transformer can be easily done with a small toroid and a couple of coils... one coil must have a resistor in parallel with it that going in series with the circuit... the other coil display the voltage across the resistor...

this signal goes to the pin 14 thru the lm318 to amplify it

the voltage signal must be taken from a secondary coil in the same vic core... few turns also amplified by another lm318  and going to pin 3 

both signals must pass thru the lm318 because it must have the same delay to make the pll work right!

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the freq dividers has the function of giving other ranges of frequency preserving the bandwidth

for example if your center frequency is 100Hz this means the maximun frequency is 200hz and minimum frequency for ex 50Hz

the bandwidth is 150hz because it can lock from 50hz to 200hz ...this is wide

meyers says that the expected variance in resonant frequency is around 10% somewhere ... this mean that 150hz of bandwidth is good for a 1,5khz frequency range

so we need to set the r2 accordingly to get a off set in frequency.... reducing r2 increase the frequency but kind of maintain the bandwidth so i came up with the great idea

i´m going to make a kind of double potentiometer so as i increase the r1 i increase r2 proportionally.

this will change the frequency off set and the bandwith at same time... preserving the ratio.. .so when this is done for example for working from 10khz to 100khz than i can use the dividers and preserve the same ranges!

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this pll is an amazing animal

i found that changing the capacitor change the range without messing with the bandwidth

the bandwidth is given by the ratio of r2 to r1

i found that a ratio of R1 > R2 +-= 5:1 to produce a nice result

using a 22kohm and 4,7kohm gives 13% bandwidth

so is possible to say that we could use a 220kohm and a 47kohm resistor rotating as one connected in series with this resistors respectively should give the 10x increase in frequency maintaining the bandwidth constant allong all the way...
 
if we want to change the bandwidth with a switch for example we could for example reduce the capacitance to increase the frequency and at the same time a frequency divider have the same frequency range but with different levels of bandwidth

other way to do it would be to have instead of 2 potentiometers glued.. to have 3.. this way using a double two way switch you can select the capacitor to be half and at same time switch in another pot in series with the r1 for ex to decrease the F0 this way the bandwidth will be 5% depending on what you choose...

if we have 3 frequency dividers in series we could imaging having maybe 10%  bw range 1% range and perhaps 0.1% range...  0.1% of 5khz is 5 hz and if we are using the 100 division range for ex you are actually working with 500khz so it has a 100000 positions for each hertz that it can hit so it can be perfectly seeing that is able to control the phase well!

hope i made the idea clear enough...

next step would be to develop a dual digital potentiometer for simply control the frequency range digitally. something like the ds1803 or something... 



 

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A fm radio uses a pll to distinguish between stations...

i guess the station you select by changing the off set R2

and the output gain by selecting the R1... because this control the center frequency and as the modulation in frequency will be limited to some extent... so this parameter will indicate how the vco will vary its voltage following the frequency modulation...

this modulation is than amplified to get to the speakers..

the pin 10 is a voltage follower of the pin 9 to give this output with more power to be amplified without interfering on the reception of the signal.


 

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Hello fabio.

I thought that PLL channel selector was a binary coded divider between the VFO and the PLL input, but I may be wrong.