Hi Tony,
That's a huge step throwing your pcb and schematic into the open-source community, thanks for that!
I hope it rendered enough funding for your research etc.
Problem I still have with your PCB is that I do not have 50% pulse duty cycle from the cell driver circuit.
And the pickup circuit has a lot off noise in the signal from the op-amp 318.
Got ideas how to fix this on your PCB?
If you have this working correctly, please let me know... or I still do not know how the PLL finds resonance with signals from the pickup and tap from the primary coil???
Thanks!
Br,
Webmug