MS11 files posted here(ORIGINAL meyer control circuits only, no modifications)

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Starting off with a SUBCIRCUIT for a 4046 PLL

OK we can post circuits that work better or that use parts with the same exact functionality as what stan meyers intended in his schematics.
For example... cd40163be counter binary synchronous used in figure 2 to set the timing for the cd4067 multiplexer chip is no longer available
obsolete... so use cd40161be, same functionality when wired ( tie pins 1, 3, 4, 5, 6, 7, 9 & 10 to VCC) pin 8 is zero volts 11,12,13,14 are ABCD respectively

Stans original Figure 2 circuit was designed with optoschmitt redundancy built in, so he used 2 mux chips...if we wire it correctly we only need one MUX chip

posting figure 2 circuit further down...soon

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between you and Tony are all the circuits on here but ive tried to put them together and lable most everything so heres a clean figure 12 with everything labled:

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Here is Figure 8. Resonant Scanning Circuit verified by the actual Stan Meyer Vic Card Photo

There seems to be some question on the actual value of the Capacitor between pin 6/2 and ground on the 555 timer.
it could be 10u or 1.0u...Don has stated that it is a 10u

maybe build it with a mini selector switch on the PCB and have both for different scan rates

The purpose of this part of the circuit is to provide the 4046 PLL chip with a variable voltage on pin 9 for a lock signal to be scanned for by the pll VCO

the measured range of voltages can be determined with a virtual voltmeter on the manual adjustment / resistor divider network by placing the Manual / Auto switch in Manual setting, because the VIC CARD photo gives us the resistor values that he used and we also know the POT was a 50k ohm

Viola ! we then know the VCO parameters he needed by inference from the manual adjustment section...

We Can Do IT !

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Here is Figure 12, ready to go

notice the cool graphics...seems this circuit likes to divide the outputs by two !

good for one simple pc board including a 7805 voltage regulator.

moving right along...

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Here is the figure 2 simulation based on what information is available so far

This circuit contains a custom 74122 subcircuit by using the pins from a 74123 in the multisim library and adding extra pins as in the datasheet for a 74122 by adding a few extra logic components... any engineers out there feel like challangeing my design please feel free to post a modified 74122 subcircuit if mine is incorrect

Thanks

( you can view the subcircuit by double clicking the 74122 subcircuit component in the figure 2 simulation file)

also:
not sure on how many signals came from the distributor

 i believe there were two breakout cables coming off the distrbutor
one for the 4 injector signals and possibly another with more for RPM sensing

How this affects the signal that is output is beyond me

also i may have the 74LS112 hooked up wrong on A1 for pin 9 destination...

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here is the 3 and 4 schematics

only one change from dynodons values and accurate according to the photos

the change is the 10u cap becomes a 1nf  ( just below Q3) to get an output waveform just before the switch that actually does something in the rest of figure 4

at least thats the way i was able to get the simulation to work......

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I have pulled my hair out over that sim.... i still cant get anything out of the second half of the 7402.... i had  it working  with one half of the 74123 but now back on the dern 7402 ughhh !!!!!

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but here is the best file ive found on the 122 n 123