Ionizationx: a clean environment is a human right!
General => General Discussion => Topic started by: ali on April 25, 2011, 11:35:23 am
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it seems that there are a few different ways to hook up those 7490 ICs
on 9XB timer pin 3 input to pin 14 on the left with pin 11 as the output of the 7490
connect 2367 &10 to ground and use pin 5 as VCC (5+)
connect 1 & 12 together and you have a divide by 10 counter
On my figure 12 simulation i used the same power and ground pins as before, but had the 555 pin 3 go to pin 14 input and used pin 11 as the output.
this time i left 1 and 12 unconnected and i got a Divide by 2 counter
Which is the best?
If both start with a center frequency of 40Khz on the 555 pot
and 9xb then gives 4Khz - 400 Hz - 40Hz as the choices
while:
fig 12 ( as a divide by 2 setup)
would give 20Khz - 10Khz and 5Khz
what is the reason behind the divide by 10 or the divide by 2 selectors in this circuit ?
DOES ANYONE HAVE THE ANSWER?????????????????????????????
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What is 9xB? Is that the "gas type" switch ?
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divide by 10, says everywhere
divide by 2, says nowhere
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This is how fig 12 should be setup.
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also here is fig 9.
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divide by 10, says everywhere
divide by 2, says nowhere
youre missing the point of my question... why not divide by 2 ?
the 50 % duty cycle is not possible with a 555 timer @ 40Khz unless the values for the pot and caps is way different than what the patent drawing shows (9XB)
to get a 50% duty cycle you need a 1.8k resistor between pin 7 and 6/2 and a 7nf cap between pins 6/2 and ground, then you need a 5k pot with a head and tail of 10 ohms...this gets you colse to 50% duty cycle at 40Khz
What i believe stan did was shoot for 40Khz center frequency and divide by 2 on the figure 12 circuit to get a clean 20Khz 50% duty cycle through the counter and the added benefit of having 10Khz and 5Khz for various timing functions in the HGMS system.
With a divide by 10 we get 1 dirty 40Khz signal to start with then we get 4 Khz 400Hz and 4 Hz these frequencies are too low to be of any use???
any comments on the functionality ?
@tony
will multisim 11 open multisim10 files???
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all u need is the divide by 10...based on the perimeters of the gated pulse generator, you will only need frequencies between 0hz-200hz...so no need for frequencies higher than that.
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to remain true to stans original patent documents
In the stan meyer full data document we find ( and in the new zealand video) he mentions 10KHZ resonant frequency
open the full data PDF and search for every occurance of the term "hz" . you will find the following:
resonant frequency 1 khz up to and beyond 10khz...
10khz for faster response to acceleration
variable pulse frequency generator maintaining a 50% duty cycle 10 khz or above, clock signal to accelerator ( output "G" )
\top of page 1-9 leds firing at 1 hz to 65 hz
Optoschmitt, LED pickup circuit at 100Khz
that pretty much says it all
Tony, your Ms10 files open with Ms11, thanks
I noticed that your figure 12 555 timer only has a range of 1.2Khz to 12.115 Khz and the duty cycle on the 555 is nowhere near 50% duty cycle
so the first thing that comes to mind is a divide by 10 counter... the result would be 1.2 Khz.... how do we get the 10Khz 50% duty cycle clock signal from the full data document then?
(thinking outside the box)
thanks again
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fig 12 controls the gate pulse frequency. The PLL is responsible for resonance of the LC circuit. The gate pulse frequency will be a fairly low frequency, not up to 10khz...Ive tested the frequency range with my circuit and anything over 200hz wont show up at all.