Author Topic: My pll circuit  (Read 25971 times)

0 Members and 1 Guest are viewing this topic.

Online Login to see usernames

  • Global Moderator
  • Hero member
  • ****
  • Posts: 3633
Re: My pll circuit
« Reply #8 on: September 20, 2012, 22:03:32 pm »
today i made some comparisons  between the different pll chips i have here...

I have the HEF4046, CD4046CN, CD4046BE, HCT7046, MC14046


The hct7046 works at 5 volts and puts out incredibly high frequencies!!! up to and beyond 10 megahetz if want perfect square wave...

The MC14046 has a strange behavior with meyer circuit, when the pin 5 is disabled, it oscillates at 13,6MHz a kind of noize it even keep the led on... I tried to add a 220pf capacitor to pin 3 and ground and this frequency became 9MHz


The cd4046be gives the lowest frequencies... followed by hef and cd4046cn...






Online Login to see usernames

  • Global Moderator
  • Hero member
  • ****
  • Posts: 3633
R2 frequency of set...
« Reply #9 on: September 21, 2012, 12:31:02 pm »
Reading the hct7046 datasheet i discovered something i didn't understood fully

The capture range of the pll is within the frequency determined by R1 and C1 being R2 infinite...

If R2 is not infinite this lock range center max and minimum frequency  will fluctuate up varying the R2.

This is highly important because this is why he used a pot for the R2 and a pot for manual frequency adjustment

The R2 sets the range max min frequencies at which the pll will try to tune in... the smaller the r2 the higher the frequency and smaller the bandwidth i would guess..


Online Login to see usernames

  • Global Moderator
  • Hero member
  • ****
  • Posts: 3633
Re: My pll circuit
« Reply #10 on: September 21, 2012, 19:15:06 pm »
That last info is the base of all working of the pll

Basically i found out that:

In my case R1 = 100k C1=10nf  R2= 10k-220k  pot... different pll chips will have different bandwidth and off sets, and linearities with same components...

R1 C1 sets the frequency lock range... for example being R2 infinite, this makes a frequency that goes from 0 up to 2khz this means a 2khz bandwidth--- being the center 1khz so it can lock to whatever frequency within this bandwidth.


The frequency off set maintain this lock range while allowing you to look into a greater range of frequencies while preserving this same bandwidth-..

so for example

Now if you add R2 say 100kohm this center frequency of 1khz jumps to to 2khz so it can lock from 1khz up to 3khz, you can check the bandwidth varying pins 9 voltage (vco) from 0 to vcc

Now lets say you reduce this R2 to 10kohm, now the center frequency is 12khz for example so you can regulate from 11khz up to 13khz

This R2 must be tuned to allow the lock range to be in the range of the frequency being received by the pll from the feedback...

By the way if you divide by 10 the frequency the bandwidth will be 10x narrower so as will ALSO be the off set, so the bandwidth will stays within a certain % range of the off set frequency...

If i recall well meyer mentioned 20%...

I took some LONG time to grasp this idea only reading the datasheets..

I guess is clear enough now for all to understand,

 i hope you enjoy...



Online Login to see usernames

  • Global Moderator
  • Hero member
  • ****
  • Posts: 3633
My pll circuit Works!!!!!!!
« Reply #11 on: September 22, 2012, 20:25:29 pm »
well now my pll is fully working, including the lock in indicator, pulse indicator, feedback...
i would like to show to you but got no camera here..
The manual frequency tuning is not even required for it to achieve lock in condition (i simply disconnected it from pin 9... and its able to follow a frequency within the bandwidth programed!!!!

The filter is also not critical, i used R3 33k resistor from pin 13 to 9 and a 1nf capacitor connected to ground...

i used a 10nf for the lock in circuit with a 100k resistor and 1n4148 diode and it lights only if there is lock in or close to... at all other frequencies it will stay off...

I don't know why i waited so long to get a real oscilloscope now i'm willing to see how far can i go now!

Online Login to see usernames

  • Global Moderator
  • Hero member
  • ****
  • Posts: 3633
Re: My pll circuit
« Reply #12 on: September 22, 2012, 20:31:20 pm »
So far i discovered that the bandwidth % is not fixed and get smaller at higher frequencies, to get around, the circuit bandwidth can be tuned changing R1 or C1

increasing R1 or C1 decreases the bandwidth as it reduce the center frequency...

The R1/C1 ratio also plays

bandwidth=Fmax-Fmin where Fmax=2F0

I'm thinking about here... a way to achieve a more linear behavior would be to make R1 smaller C1 bigger. ...  thats because i think the problem of linearity start to arise when R2 is too much smaller than R1...

Online Login to see usernames

  • Global Moderator
  • Hero member
  • ****
  • Posts: 3633
Great Great news!
« Reply #13 on: September 23, 2012, 16:54:16 pm »
It ended up that i was right about the R2/R1 relation, as it become lower than 1 the linearity become poor.

I changed the R1 to 10k, the C1 now is 1nf and simply disconnected not only the manual tuning but also R2
at the filter now there is a r4 resistor 10k between the a 10nf capacitor and ground... this improved a lot stability of the lock

The circuit is now able to automatically tune into whatever frequency from 1khz up to 100khz... or more or less i didn't tested all the range hahah

its amazing


It will never lose the lock in condition.. the led stays light!!! the lock in led still 10nf...

0 ZERO phase difference between input at pin 14 and output... within all this tested range... instant lock...

oh and it also lock in when dividing the frequency with the 4017 chips, no worries about that too...

now is time to play!!!!!!!!

Regards

Online Login to see usernames

  • Administrator
  • Hero member
  • ****
  • Posts: 4538
    • water structure and science
Re: Great Great news!
« Reply #14 on: September 23, 2012, 17:51:20 pm »
It ended up that i was right about the R2/R1 relation, as it become lower than 1 the linearity become poor.

I changed the R1 to 10k, the C1 now is 1nf and simply disconnected not only the manual tuning but also R2
at the filter now there is a r4 resistor 10k between the a 10nf capacitor and ground... this improved a lot stability of the lock

The circuit is now able to automatically tune into whatever frequency from 1khz up to 100khz... or more or less i didn't tested all the range hahah

its amazing


It will never lose the lock in condition.. the led stays light!!! the lock in led still 10nf...

0 ZERO phase difference between input at pin 14 and output... within all this tested range... instant lock...

oh and it also lock in when dividing the frequency with the 4017 chips, no worries about that too...

now is time to play!!!!!!!!

Regards

Congratulations! :) :) :)
Well done!

Steve

Online Login to see usernames

  • Global Moderator
  • Hero member
  • ****
  • Posts: 3633
Re: My pll circuit
« Reply #15 on: September 23, 2012, 17:56:55 pm »
I found that R2 might still useful to limit the range of frequencies.. and that at lower much lower frequency the filter capacitor must be increased or strange pulses will come out with strange duty cycles... The damping resistor R4 is there to help to avoid oscillation at the filter capacitor, as it tries to find the right vco voltage, this way the capacitor can be smaller so the lock in is faster...

 i tested up to 47uf at the filter... you can see it tuning at slowmotion with high capacitors walue when you change the frequency...